Article-Journal

Designing Secure TLBs
This article reveals timing-based side-channel and covert-channel attacks from the translation look-aside buffers (TLBs) and discusses …
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Survey of Approaches and Techniques for Security Verification of Computer Systems
This article surveys the landscape of security verification approaches and techniques for computer systems at various levels: from a …
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Evaluation of Cache Attacks on Arm Processors and Secure Caches
Timing-based side and covert channels in processor caches continue to be a threat to modern computers. This work shows for the first …
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Topological Approach to Automatic Symbolic Macromodel Generation for Analog Integrated Circuits
In the field of analog integrated circuit (IC) design, small-signal macromodels play indispensable roles for developing design insight …
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